Modern mobile communications devices often require power amplifiers capable of producing a linear output over a wide frequency band while maintaining a high level of efficiency. One way to improve the efficiency of a power amplifier is to bias the amplifier such that it remains off or partially off until a signal is received at the input of the amplifier. However, operating an amplifier in this manner often leads to undesirable signal components generated at the harmonic frequencies of the input signal. These harmonic signals may disturb the linearity of the amplifier or result in other undesirable distortion at the output of the amplifier.
Differential power amplifiers have been designed using harmonic trap circuitry to suppress the presence of harmonic signals at the output. Due to the wide bandwidth operating conditions of many power amplifiers, this trap circuitry must be designed to compensate for harmonic signals encompassing a wide frequency band. Although effective, trap circuitry designed in this manner exhibits a high amount of capacitive loading at the fundamental frequency of the input signal to the differential power amplifier. The capacitive loading at the fundamental frequency degrades the efficiency of the power amplifier, leading to sub-optimal performance. Further, the capacitive loading may lead to unrealistic or undesirable design constraints on the output matching network of the power amplifier. Accordingly, there is a need for a highly efficient, linear differential power amplifier that is capable of operating over a wide bandwidth while suppressing harmonic signals and avoiding the negative effects of capacitive loading.